1. Field of the Invention
The invention relates to a photoelectric conversion device which is to be used in an image information processing apparatus, such as a facsimile apparatus, an image scanner, or a video camera, or in a photometric apparatus, such as a camera, and in particular, to a photoelectric conversion device which is adapted to accumulate optically generated carriers in the control electrode region of a transistor and to read a signal on the basis of the carriers thus accumulated.
2. Related Background Art
Examples of conventional photoelectric conversion devices are disclosed in U.S. Pat. No. 4,791,469 granted to the inventor Tadahiro Ohmi, et al., U.S. Pat. No. 4,810,896 granted to the inventor Nobuyoshi Tanaka, et al., European Patent Laid-Open Publication No. EP0260858, Japanese Patent Laid-Open No. 63-076476 (which is a counterpart to the above European patent laid-open publication), etc.
The photoelectric conversion devices proposed in these publications are of the type in which an output circuit including a capacitance load is connected to the emitter of a phototransistor and in which a photoelectric conversion signal voltage based on optically generated carriers that are accumulated in the base of this phototransistor is read from the capacitance load connected to the emitter.
In the following, this conventional type of photoelectric conversion device will be briefly described with reference to FIGS. 1A to 2.
FIG. 1A is a plan view of a photoelectric conversion device with the above-described conventional structure; FIG. 1B is a sectional view taken along the line I--I of FIG. 1A; and FIG. 2 is an equivalent circuit diagram of this conventional photoelectric conversion device.
In FIG. 1, the reference numeral 1 indicates an n-type semiconductor substrate. The reference numerals 3, 4 and 5 indicate an epitaxial layer of an n.sup.- -type semiconductor, a base layer of a p-type semiconductor, and an emitter layer of an n.sup.+ -type semiconductor, respectively. The reference numerals 7 and 8 indicate a field insulating film and an emitter electrode, respectively. The reference numerals 23 and 24 indicate an n.sup.+ -type semiconductor having the functions of device isolation and ohmic contact, and a collector electrode, respectively. The above-mentioned components form a basic phototransistor. The reference numerals 25 and 26 indicate insulating films, and the reference numeral 27 indicates a shielding film.
As shown in FIGS. 1A and 1B, the base layer 4 of a p-type semiconductor (hereinafter referred to as the "p-type base layer"), which constitutes the control electrode region of the bipolar transistor Tr, is formed in the area around the emitter layer 5 of an n.sup.+ -type semiconductor (hereinafter referred to as the "n.sup.+ -type emitter layer"), in the opening area L, and in the area in the vicinity of the opening area L. When light impinges upon that portion of the p-type base layer 4 which is in the opening area L, this portion gathers and accumulates carriers that are generated mainly in the epitaxial layer 3 of an n.sup.- -type semiconductor (hereinafter referred to as the "n.sup.- -type epitaxial layer").
In the following, a brief explanation will be given of the basic operations of such a photoelectric conversion device, i.e., the resetting, accumulation and reading.
First, in the resetting operation, the p-type base layer 4, which constitutes the control electrode region, is reset by means of a p-channel MOS transistor RT, which is composed of a source region 20, a drain region 21, and a gate electrode 22. Through this resetting, the device is initialized for the accumulation of carriers.
Next, in the accumulating operation, carriers generated mainly in the n.sup.- -type epitaxial layer 3 having depletion layers are gathered in the p-type base layer 4 formed in the opening area L and are accumulated therein. An accumulation voltage is generated in this p-type base layer 4.
In the reading operation, the accumulation voltage generated in the p-type base layer 4 is read from the emitter of the bipolar transistor Tr as the output voltage.
Afterwards, the device goes back to the resetting operation, repeating the above series of operations.
Although the above-described photoelectric conversion device, which is of a charge amplification type, provides high sensitivity, it leaves much room for improvement before it can achieve such a high sensitivity as is desired today. In view of this, numerous experiments have been repeatedly conducted and the results thereof have been examined finding a fundamental problem to be solved, which will be described below.
In the above-described conventional photoelectric conversion device, the p-type base layer 4, which is formed in the opening area L and which constitutes the control electrode region, generates a junction capacitance Cbc in the border section between it and the n.sup.- -type epitaxial layer 3, which constitutes the collector. The generation of this junction capacitance causes the parasitic capacitance of the control electrode region to be augmented, with the result that the accumulation voltage generated by the accumulation of carriers is lowered. If the accumulation voltage thus lowered is supplied to the emitter of the bipolar transistor Tr, the output voltage at this emitter will be accordingly low. This has been one of the factors preventing the output sensitivity of a photoelectric conversion device from being further improved.